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The Ultra-Low Power Open-source Coreto Accelerate the Spreading of RISC-V in Chinabob [email protected] 20181

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V2

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V3

Personal IntroductionBob Hu Highlights Over 10 years of ASIC design and verification experiences with 8 years of CPU industry experiencesEducation Background bob [email protected] of Microelectronics, Bachelor of EE, Shanghai Jiaotong UniversityWork Experiences 2018 NowFounder, Nuclei System Technology 2017 2018Processor Architect, Wuhan Silicon Integrated 2016 2017ASIC Director, Bitmain AI processor 2012 2016R&D Manager, Synopsys ARC processor IP 2010 2012Senior CPU Designer, Marvell“硅农亚历山大”

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V5

The Status of RISC-V in ChinaPositive and Negative Status Positive Status The ecosystem from industry and community growing very quickly in China Mainland More and more people start to know RISC-VNegative Status Very few people know RISC-V before year 2018 Very few people understand RISC-V Many people even now treat RISC-V equal to another free and open-source Core The most frequently asked question I heard is: I heard there is a RISC-V, then where can I download that “free core”?—— Very few people can understand the profound effect of RISC-V to China semiconductor industryMakes me dont know how to answer this question Very few RISC-V cores developed by China player Very few Chinese materials (include hardware and embedded software tools) for beginners Very few Schools have already used RISC-V to educate in the classroom Very few professional RISC-V processor IP company in China

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V7

Our Passion of RISC-V in ChinaOur Passions and Contributions Negative Situations Very few RISC-V coresdeveloped by China player Very few people know RISC-Vbefore year 2018 Very few people understandRISC-V Very few Chinese materials(include hardware andembedded software tools) forbeginners Very few Schools have alreadyused RISC-V to educate(Starting Ongoing) Very few professional RISC-Vprocessor IP company in China Our Works to Improve Them We developed and open-sourcedHummingbird E203 core I Started a WeChat subscriptionnumber(微信公众号)to popularizeRISC-V concepts I published the 1st Chinese RISC-Vbook I am ongoing to publish 2nd ChineseRISC-V book We are promoting HummingbirdE203 into the education fields We have established one start-upCompany now!2nd BookRISC-V架构与嵌入式 开发快速入门(RISC-VEmbeddedQuick Start)

Our Passion of RISC-V in ChinaThe 1st open-source RISC-V Core from China Mainlandhttps://github.com/SI-RISCV/e200 opensource

Our Passion of RISC-V in ChinaWeChat subscription number(微信公众号)

Our Passion of RISC-V in ChinaThe 1st Chinese RISC-V Book in ChinaThe book Introduced in: https://mp.weixin.qq.com/s/eECYepzO8c FS I9u2zIaA

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V12

Overview of Hummingbird E203 CoreThe 1st Open-Source RISC-V in China Ultra low-area 32bits RISC-V processor core Two pipeline stages Support RV32IMAC architecture Area and Power in rival to Cortex M0/M0 /M3 Integrated ITCM (Instruction Tightly CoupledMemory) and DTCM (Data Tightly CoupledMemory) Open-sourced in Githubhttps://github.com/SI-RISCV/e200 opensource PLICHummingbird Ultra-Low-PowerProcessor Core Application Domains General or specified MCU core Mix-signal Chip controller core SoC controller coreDebugModuleIRQ ItfDebug ItfHummingBird E203 ystem BusSRAMFlashFast-IOItfFast-IOModulesExtMem

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V14

Details of Hummingbird E203 CorePipeline Details Main Pipeline is two Stages Optimized for Area, timing and powerNOTE: ITCM and DTCM is integrated inside Core

Details of Hummingbird E203 CoreInterfaces Master Interfaces Fast-IO Interface System Bus Interface Private Peripheral InterfaceIRQ Itf ITCM External Interface DTCM External InterfaceInterrupt InterfaceInterface with platform level interruptcontrollerDebug Interface Interface with Debug-ModuleDebug Itf“HummingBird”E203 CoreSlave Interface stemBusItfSystem BusSRAMFlashFast-IOItfFast-IOModulesExtMem

Details of Hummingbird E203 CoreComparison Hummingbird E203 in Comparison with ARM Cortex M0/M0 Cortex-M0Cortex-M0 Hummingbird E203 Dhrystone DMIPS/MHz 0.84 0.93 1.23 CoreMarks/MHz 1.62 1.77 2.15 Minimal Configuration(Gates) 12K 12K 12K Pipeline Stages Hardware Multiplier Hardware Divider ITCM and DTCM 3 stages 2 stages Yes (Configurable for single-cycle or Multicycles implementations) No No embedded ITCM and DTCM, needcustomer to integrate by themselves(Typical Config 18K)2 stages Yes (Multi-Cycles Implementation) Yes (Multi-Cycles Implementation) Provide embedded ITCM (64bits wide) andDTCM to easy customerNote: Besides open-sourced Hummingbird E203,there are commercial version (Nuclei N200 Series)which can contactBob Hu by adding WeChat subscription number(微信公众号:硅农亚历山大)

Details of Hummingbird E203 CoreFeatures Instruction Set Architecture Features: Supporting architecture RV32IMAC Supporting Machine Mode Only Supporting Interrupts, PLIC, TimerHighlighted Open-source FeaturesBasic JTAG interactive debug support ExternalDTCMInterfaceExternalITCMInterfaceOther PeripheralInteraceMainDomainDTCMITCMHummingbird E203 RISC-V CoreMMPLICFast-IOInterface FPGA demo supported with detailed doc Embedded software SDK and demo providedMROMJTAG InterfaceNote: Will be introduced later with more detailsMCLINTMemory BusTogether with typical fully SoC open-sourced MMDebugModuleQSPIFlashReadOther 1QSPI2OTPQSPI0ExternalNor Flash

Details of Hummingbird E203 CoreInterfaces Protocol The open-source version use Self-defined ICB interface Very simple, combined the merits of AHB and AXI, very easy to be converted to AHB/AXI/APBNOTE: The commercial version provide AHB/AXI/APB interfaces configurable

Details of Hummingbird E203 CoreCoprocessor Extension The EAI (Extended Accelerator Interface) Four-Channels Coprocessor InterfaceFour Channels protocol defined Instruction Request ChannelExtended Instruction accelerator just need to followthe protocol Instruction Response ChannelThe extended Instructions can just use the reserved“custom”instructions inline into the C/C program,no need to change the compiler toolchainNOTE: The EAI Interface is not yet open-sourced(the intern student is wanted) The commercial version provide EAIE203Core Memory Request Channel Memory Response ChannelExtendedInstructionsAccelerator

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V21

The Published 1st Chinese RISC-V BookContents of Book All Other Detailed Informationcan be seen from the book

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V23

The Board for Hummingbird E203FPGA-based MCU Board Xilinx FPGA based MCU Board( 399 1299RMB)

The Board for Hummingbird E203FPGA-based MCU Board Anlogic (上海安路) FPGA based MCUBoard ( 100RMB)PANGO (紫光同创) FPGA based MCUBoard ( 100RMB)

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V26

The next coming 2nd Chinese RISC-V BookContents of Book The 1st book is to spread RISC-V bydetailed introduction of E203 Core Targeting for hardware Chip designerThe 2nd book is to introduce how touse RISC-V for embedded softwaredevelopment Targeting the embedded software programmerThis is even more important because most of thepeople are the user, who are not interested intodesigning CPU but just using CPUWill be firstly opened in the WeChat 山大)

Agenda Personal Introduction The Status of RISC-V in China Our Passion of RISC-V in China Overview of Hummingbird E203 Core Details of Hummingbird E203 Core The Published 1st Chinese RISC-V Book The Board for Hummingbird E203 The 2nd Coming Chinese RISC-V Book The Education Program for RISC-V28

The Education Program for RISC-VEducation Program Provide the trainings for beginners .Promote the open-source Hummingbird E203 into the Classroom of Chinese University With books With boards With the pre-designed class contents Conduct the contests and club Thinking very hard . .Need help .

Q&AThanks30

Nuclei N200 SeriesRISC-V Core IP IntroductionBob HuJune 201831

Company Introduction Our Missions To be a RISC-V processor core vendorbased on China Mainland Enable Chinese semiconductor industrywith RISC-V Core with China MainlandDomestic Autonomy(国产自主可控)and better local serviceBusiness Scope RISC-V processor core IP licensing RISC-V processor core and subsystem customizationHighlights Hummingbird E203 processor core with ultra low-area/power features, launched at 2017 (1st RISC-V from ChinaMainland) targeting to Deeply-embedded and IoT domains Nuclei N200 series included the N203, N205, N207 The measured data from real silicon chip proved the better power consumptions over rival Cortex-M core Perfect replacements to ARM Cortex-M processor cores with lower royalties

Low-power core with ICache to easy SIP with Nor FlashNuclei N200 Overall IntroductionN200 Processor Core Series Replace ARM Cortex-M4F/M7 fordouble-precision floating-pointNuclei N200 Series Features and Comparison N203 N205 N205f N205fd N207 RISC-V ArchRV32IMACRV32IMACRV32IMAFCRV32IMAFDCRV32IMAC HardwareMultiplier/DividerYes 17 cycle Multiplier 33 cycles dividerYes 1 cycle Multiplier 33 cycles divider Single-precision FPUNoNoYesYesConfigurable Double-precision FPUNoNoNoYesConfigurable ICacheNoNoNoNoYesReplace ARM CortexM0/M0 Replace ARM CortexM0/M0 /M3Replace ARM Cortex-M4F for singleprecision floating-point

The Merits of Commercial VersionE203 Open Source VersionN200 Commerical Version Full features of JTAG debuggingNoYes Quality and Service WarrantNoYes Optimization of Area and performanceNoYes Hierarchical Structure for Easier IntergrationNoYes Standard AMBA Bus InterfaceNoYes Extending Interface for Co-ProcessorsNoYes Dual Lines Debugging InterfacesNoYes Fast Vector Nested Intrrupt ControllerNoYes Multiple-Privilege Levels and MPU Unaligned Load/Store handled by HardwareNoNoYesYes

Nuclei N200 Overall IntroductionN200 Processor Core Series over ARM Nuclei N200 Series in Comparison with ARM Cortex-M SeriesCortexM0CortexM0 CortexM3CortexM4FN203N205N205fN205fdN207 Dhrystone DMIPS/MHz 0.84 0.93 1.25 1.25 1.23 1.47 1.47 1.47 1.47 CoreMarks/MHz 1.62 1.77 3.32 3.40 2.15 3.36 3.40 3.40 3.36 3.40 Minimal Config(Gates) Pipeline Stages Hardware Multiplier 12K 12K 36K 90K 12K 20K 60K 90K Configurable 2 stages 2 stages 2 stages 2 stages 2 stages Hardware DividerSingle-precision FPUDouble-precision FPUDSP ExtensionInstruction CacheITCM and DTCM 3 stages 2 stages 3 stages Yes Yes Yes Yes Yes(1cycle) Yes(1cycle) Yes(1-cycle)(1-cycle or Multi-cycles) No No Yes Yes(1(Multi-cycles cycle) Yes Yes Yes Yes Yes Yes No No No Yes No No Yes Yes Configurable No No No No No No No Yes Configurable No No No Yes Support user define and extendable No No No No No Yes No No No embedded ITCM and DTCM, need customer Provide embedded ITCM (64bits wide) and DTCM to easy customerto integrate by themselves Provide ECC protection to ITCM and DTCM ECC protection to ITCM/DTCM Need customer to implement by themselves No Support user to extend instructions Extendibility

Nuclei N205Core Introduction Features Based on 2 stage pipeline implementations Area in rival to Cortex-M0 , performance inrival to Cortex-M3 Provided embedded Tightly Couple MemoriesITCM and DTCM with ECC protectionsupportedProvide dedicated instruction interface tosupport eFlash or another ITCM2ITCMExternalItfDTCMExternalItfPLICCoprocessor ItfIRQ ItfITCMDTCMPrivatePeripheralItfPeripheral BusStrengths Support User-Expendability(e.g., userdefined DSP operation)Perfect Replacement to ARM Cortex-M3 Better Performance Smaller Areas Lower Royalty ebug ItfN205 tfSystem BusSRAMExtMemFast-IOItfFast-IOModules

Nuclei N207Core Introduction FeaturesIn additional to N205 features: Added ICache(2-Way,32Bytes Cache LineSize,Cache-Size configurable )Added Configurable DCache(2-Way,32BytesCache Line Size,Cache-Size configurable )ITCMExternalItfDTCMExternalItfIn additional to N205 features: Utilize the ICache, use SIP package externalNor-flash, to reach better flexibility and cost The ITCM size can be reduced, the eFlash canbe eliminated to reduce die cost Note:The critical instruction can still be put inon-chip ITCM (but with smaller size)PLICCoprocessor ItfIRQ ItfITCMDTCMPrivatePeripheralItfStrengthsPeripheral bug ItfN207 heSystemBusItfSystem BusSRAMExtMemSIPNor FlashFast-IOItfFast-IOModules

Tool-chain and SoftwareDevelopment Environment C/C Compiler Software Development Kit Eclipse C/C Development IDE Note:utilize the whole RISC-V ecosystem,any IDE supporting RISC-Vwill support Hummingbird E200(because of standard ISA)Software SimulationBased on QEMUJTAG Debugger Hbird-E-SDK:based on GCC ToolchainWindows and Linux IDE Standard GNU GCC Toolchain(with both Linux and Windows version)JTAG Debugger(USB-Disk size,Cost around 30 RMB)RTOS Support FreeRTOS RT-Thread Note:utilize the whole RISC-V ecosystem,any RTOS supporting RISCV will support Hummingbird E200(because of standard ISA)

Q&AThanksbob [email protected]

Highlights Over 10 years of ASIC design and verification experiences with 8 years of CPU industry experiences Education Background Master of Microelectronics, Bachelor of EE, Shanghai Jiaotong University Work Experiences 2018 Now Founder, Nuclei System Technology 2017 2018 Processor Architect, Wuhan Silicon Integrated 2016 2017 ASIC Director, Bitmain AI processor